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Two-Dimensional topology for faster, more robust on-chip interconnection networks
Summary
Dominique Deserable, Ph.D.
Technology Benefits
Increased connectivity, making it more fault-tolerant than the existing 2D torus.Shorter paths between cores, which decreases computing time. Ultimately, this leads to more computing power in a more robust network. An easy-to-implement routing algorithm mathematically proven to find the shortest paths.
Technology Application
Parallel computing in supercomputersArchitecture for telecommunications networksMulticore system processing in embedded systemsMulticore system processing in mobile devicesMulticore system processing in personal computers and tabletsScalable parallel IP address lookup architecture using algorithm of 2D torus
Detailed Technology Description
Dominique Deserable, Ph.D.
Country/Region
USA
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