A High-Throughput Asynchronous Pipeline Style Using a Transition-Signaling Protocol
- Summary
- Steven M. Nowick, Ph.D.
- Technology Benefits
- Reduces overhead communication of a high-speed synchronous clockAllows design of very high-throughput fine-grain pipeline circuits to the maximum extentAvoids explicit latches with a clocked-CMOS style to improve area and performanceUses simple, easily met, one-sided timing constraints for practical design that is easy to implementReduces pipeline cycle timePatent information:Patent Pending (WO/2002/035346)Tech Ventures Reference: IR M01-020
- Technology Application
- Wearable electronics such as watches, glasses, wristbands and athletic gearBiosensors with electronic interfacesTablet, laptop, computer microprocessorsLab on a chip technologyEthernet switch chipsLow-latency finite-impulse response filter chips
- Detailed Technology Description
- Steven M. Nowick, Ph.D.
- *Abstract
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None
- *Inquiry
- Jay HickeyColumbia Technology VenturesTel: (212) 854-8444Email: TechTransfer@columbia.edu
- *IR
- M01-020
- *Principal Investigator
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- *Publications
- Montek, S., Nowick, S.M. “MOUSETRAP: High-speed Transition-signaling Asynchronous Pipelines” IEEE Transitions on VLSI. 2007 June; 15(6):684-698.
- *Web Links
- Patent number: US20040046590
- Country/Region
- USA
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