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Low-power GPS Processor

Detailed Technology Description
The technology is an asynchronous GPS baseband processor architecturethat minimizes power consumption while providing continuous positioninformation.
Others
*Abstract

The technology is an asynchronous GPS baseband processor architecturethat minimizes power consumption while providing continuous positioninformation. The system achieves low power by allowing all subsystems to run attheir natural frequencies without clocking and all signal processing is doneon-the-fly. The technology decouples crucial GPS receiver operationsfrom power-hungry post-processing. This allows the GPS receiver to be deployedanywhere to perform only crucial receiver operations and transmits just enoughinformation back to the base station for further processing.

      

Based on transistor-level simulations, this system consumes only 1.4 mW with positioning errors below 4 meters, comparing favorably to other contemporary GPS baseband processors, and enabling continuous, accurate operation for extensive periods of time. A prototype system is in development.

         

Potential Applications:

Any location-aware mobile device, e.g. smart phones, GPS trackers, geo-tagging cameras, etc.

          

Advantages:

Low power consumption enables long-term continuous operation

*Licensing
Martin Teschlmt439@cornell.edu(607) 254-4454
Country/Region
USA

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