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SMTSIM
Detailed Technology Description
University researchers have written an instruction-level simulator of a simultaneous multi-threading (also known as hyper-threading) processor. The software provides detailed simulations of a pipelined out of order processor with all sources of latency modeled. The software is compatible with Unix operating systems using a standard C compiler. A minimum of 64 Megabytes of RAM storage are recommended, along with a printer for reporting out results. Source code is available.
Others
Tech ID/UC Case 19313/2002-810-0 Related Cases 2002-810-0
Country/Region
USA
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