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Lithographically Patterned Nanowire Electrodeposition

Technology Application
This invention can be used for the synthesis of ultra-small nanowires.
Detailed Technology Description
University researchers have developed a technique called Lithographically Patterned Nanowire Electrodeposition (LPNE) as a new method for synthesizing noble metal nanowires on glass or oxidized silicon surfaces.Nanowire fabrication methods can be classified either as "top down", involving photo- or electron beam lithography, or "bottom-up", involving the synthesis of nanowires from molecular precursors. LPNE combines attributes of photolithography with the versatility of bottom-up electrochemical synthesis. Photolithography is employed to define the position of a sacrificial nickel nanoband electrode that is recessed into a horizontal trench defined by the substrate surface and photoresist. This trench acts as a "nanoform" to define the height of an incipient nanowire during its electrodeposition. The width of the nanowire is determined by the electrodeposition duration. Removal of the photoresist and nickel reveals a nanowire - composed of gold, platinum or palladium - with a rectangular cross section and a height and width that can be independently controlled, down to 20 nm. The polycrystalline nanowires synthesized by LPNE can be continuous for more than 2 cm. These nanowires show a metal-like temperature dependence of their resistance.
Supplementary Information
Patent Number: US8142984B2
Application Number: US2009376209A
Inventor: Penner, Reginald M. | Menke, Erik J. | Thompson, Michael A. | Xiang, Chengxiang
Priority Date: 24 Aug 2006
Priority Number: US8142984B2
Application Date: 3 Feb 2009
Publication Date: 27 Mar 2012
IPC Current: G03F000700 | G03F000726 | G03F000740 | G03F000742
US Class: 430311 | 430318 | 430322 | 430331
Assignee Applicant: The Regents of the University of California
Title: Lithographically patterned nanowire electrodeposition
Usefulness: Lithographically patterned nanowire electrodeposition
Summary: The process is useful for forming metal nanowires on insulating surfaces using lithographically patterned nanowire electrodeposition.
Novelty: Forming metal nanowires on insulating surfaces using lithographically patterned nanowire electrodeposition, comprises depositing metal electrode layer on insulator substrate, and depositing layer of photoresist on the metal electrode layer
Industry
Optics
Sub Category
Optical Element
Application No.
8142984
Others

Lead Inventor

Reginald M. Penner
Professor & Chair, Department of Chemistry
School of Physical Sciences
University of California, Irvine

http://www.faculty.uci.edu/profile.cfm?faculty_id=2040


Additional Technologies by these Inventors


Tech ID/UC Case

18766/2007-062-0


Related Cases

2007-062-0

*Abstract

Electron beam lithography (EBL), invented in the early 70's, provides a means for patterning polycrystalline metal nanowires as small as 20 nm in diameter onto surfaces. The applicability of EBL, however, has been limited to research and development applications because it is a serial patterning technology. In 1990, a parallel version of EBL was developed, but space charge "blurring" has prevented this technique from approaching the resolution of direct-write EBL. By using, as a template, semiconductor surfaces with atomically-defined grooves and troughs, past researchers had prepared sub-10 nm metal nanowires using vapor deposition. Others used a variant of this approach to create high density arrays of linear, 10 nm diameter Pt nanowires. UC Irvine researchers have demonstrated that ensembles of 30 nm antimony nanowires can be prepared by electrochemical step edge decoration on graphite surfaces coupled with etching, but no control of nanowire position on the surface or inter-wire pitch has been possible using this method.

*IP Issue Date
Mar 27, 2012
*Principal Investigator

Name: Erik Menke

Department:


Name: Reginald Penner

Department:


Name: Michael Thompson

Department:


Name: Chengxiang Xiang

Department:

Country/Region
USA

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