High-throughput asynchronous dynamic pipelines
Lead Inventors: Montek SinghSystem for latchless dynamic asynchronous digital pipelines providing high buffering and high throughput. The latchless dynamic asynchronous digital pipeline uses control information for a processing stage.The pipeline circuit comprises of two processing stages. The processing stage includes a function block enabled to enter a pre-charge phase and a completion generator in responsive pre-charge control signal. The generator is configured to provide an indication to the processing stage that the function block has been enabled in parallel with such enablement. The system provides a pipeline having protocols with no explicit latches that have reduced critical delays, smaller chip area, lower power consumption, and simple, small and fast control circuits to reduce overhead cost.
System for latchless dynamic asynchronous digital pipelines providing high buffering and high throughput. The latchless dynamic asynchronous digital pipeline uses control information for a processing stage.The pipeline circuit comprises of two ...
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