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Assertion Generation Suite

Detailed Technology Description
University of Illinois researchers have developed a suite of assertiongeneration tools.
*Abstract

University of Illinois researchers have developed this suite of assertiongeneration tools which includes: 

  1. A Figure of Merit Evaluation: a method to evaluate and rank assertions used in hardware design validation based on readability and importance.
  2. Code Coverage Evaluations of Hardware Assertions: a method to estimate the code covered by an assertion used in hardware design validation.
  3. Word Level Assertion Generation: a method to generate assertions used in hardware design at the word level rather than at the bit level. This is likely to make the asertions more usable and easier to read.

For more information about this technology, please contact the University of Illinois at Urbana-Champaign Office of Technology Management at otm@illinois.edu.
Country/Region
USA

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