Active RFID Tag Power Optimization Architecture
- Detailed Technology Description
- None
- *Abstract
-
The conservation of battery power for an active RFID tag is extremely important for low tag maintenance. In scenarios where an inquiry is made for a single tag on a frequent basis, the wakening of the non-targeted tags uses a large amount of power that is wasted. The ability to reduce the overall power consumption for each tag in a set of tags is the basis for this invention. The energy saving mechanism on the active RFID tags is termed a smart buffer which is a circuit fabricated in silicon that looks at the destination of each packet of an ISO Standard Part 7 and produces a wake-up signal only if the base station inquiry is for the specific 1 of m or k of m sensor equipped tags. The smart buffer requires considerably less power than is required by the tag to interrogate the same message to determine the target destination. This invention presents a model tracking the energy used by a set of tags. It provides a basis to investigate and determine what conditions must be met for the smart buffer equipped tag to produce a net energy savings.Provisional Patent Application Filed.
- *Principal Investigator
-
Name: James Cain, Professor
Department: Electrical and Computer Engineering
Name: Raymond Hoare, Assistant Professor
Department: Electrical and Computer Engineering
Name: Alexander Jones
Department: Electrical and Computer Engineering
Name: Marlin Mickle, Professor of Electrical Engineering
Department: Electrical and Computer Engineering
- Country/Region
- USA
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