Method of Preparing Fine-Pitch Electroplated Solder Bumping for Flip-Chip微細間距倒裝銲凸點電鍍製備技術
Electroplating-based flip chip solder preparation process had been widely used over other preparation methods. Although it is cheaper and is able to achieve the material deposition on the fine pitch I/O pads, the solder bumps resulted are not uniform and not quality-guaranteed.
In this invention, manufacturing of fine-pitch solder bumps on the wafers is made possible. It can achieve solder bumps manufacturing with 50microns space. The solder bump size is from 50 to 300microns. The solder materials will not collapse on the surface of wafers during the reflow process because of a specially designed layer. Series of photolithography process including the designing method of related photolithography mask can achieve the high quality and thick photoresist. The parameters of electroplating process and the process designed are also provided to improve the quality of solder and eliminate the IMC effect.
1. High quality and thick photoresist (50-175microns)
2. Improved quality of Cu and solder
3. Elimination of IMC effect
4. Photolithography process is improved
5. Lower cost
- Solder bumping process
- Electronic product packaging application
- Wafer bumping production
Patent Number: HK1070927A1
Application Number: HK2005103510A
Inventor: CHAN PHILIP CHING HO | XIAO DAVID GUOWEI
Priority Date: 31 May 2003
Priority Number: HK1070927A1
Application Date: 25 Apr 2005
Publication Date: 10 Aug 2007
IPC Current: C25D000712 | H01L002144 | H01L002160 | H01L002302 | H01L0023485
Assignee Applicant: The Hong Kong University of Science & Technology
Title: Method of preparing fine-pitch electroplated solder bumpoing for flip-chip
Usefulness: Method of preparing fine-pitch electroplated solder bumpoing for flip-chip
電子
半導體
25 Apr 2005
Hong Kong 05103510.0
Hong Kong HK1070927
TTC.PA.211S
香港
