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Double-Gate SOI with High Performance Sense Amplifier
Summary
Purdue University researchers have developed a high-performance sense amplifier design using independent gate control in symmetric and asymmetric DG devices. This design reduces the sensing delay of the sense amplifier and dynamic power from the connected gate design. In addition, this sense amplifier shows less power dissipation, delay, and is more robust to process variations.
Technology Benefits
Reduced sensing delay Less power dissipation and delay More robust
Technology Application
Semiconductors
Detailed Technology Description
Kaushik RoyNanoelectronics Research LaboratoryPurdue Electrical and Computer Engineering
Countries
United States
Application No.
7,304,903
Country/Region
USA
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