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Optimized Vertical Power DMOSFETS in Silicon Carbide
Summary
Researchers at Purdue University have developed a structure and method of fabrication of a vertical DMOSFET in silicon carbide that achieves minimum on-state resistance and maximum breakdown voltage.
Technology Benefits
Increases breakdown voltage without increasing internal resistivityProvides consistent internal resistance at a greater operating temperature range
Technology Application
MaterialsManufacturing
Detailed Technology Description
James Cooper Jr.Purdue Electrical and Computer Engineering
Countries
United States
Application No.
7,498,633
Country/Region
USA
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