Temperature Compensation for Floating-Gate Memory Circuit

Introduction Nonvolatile computer memory is a type of memory chip that retains its data even when its power supply is turned off. One example is the erasable, programmable read-only memory chip (EPROM). Nonvolatile memory can store multiple bits per cell by storing a range of charge levels in a floating-gate analog memory cell. One of the challenges of floating-gate memory, such as the EPROM, is balancing temperature compensation and memory capacity or density. Although methods for temperature variation compensation exist, the large-form factor often limits their application to small-scale processors. While it is physically possible to store more bits per cell (the current standard for memory density is 4 bits per cell), the need to compensate for temperature fluctuations does not allow for reliable storage. Description of Technology Michigan State University’s invention is a circuit for designing and manufacturing temperature-compensated, floating-gate analog memories with increased storage capacity (possible up to 8 bits per cell or greater). The technology is scalable to smaller future processing scales. It also could be used to improve the storage capacity of any EPROM or other nonvolatile analog memory. Key BenefitsTemperature compensation: While floating-gate memory technology is limited by temperature constraints, this technology improvement is temperature invariant.Increased memory storage per cell: Due to noise and temperature effects, most floating-gate memory is limited to 4 bits of memory per cell. This temperature-compensating technology increases memory-storage density from the standard 4 bits to 8 bits per cell by improving the integration density of current analog memories.Scalable: The technology would continue to apply with future reductions in chip size. ApplicationsNonvolatile, temperature-compensated memoryFlash drives and flash memoryMemory cardsAnalog signal-processing circuitsAnalog integrated circuitsEnergy-scavenging sensors Patent Status Patent pending Inventors Shantanu Chakrabartty, Ming Gu, Chenling Huang Tech ID TEC2011-0016

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