CHIP STACKING
Methods and systems are provided to utilize and manufacture a stacked chip assembly. Microelectronic or optoelectronic chips of any dimensions are directly stacked onto each other. The chips can be of substantially identical sizes. To enable forming the stacked chip assembly, trenches are laser micro-machined onto the bottom surface of a chip to accommodate the bond wedge/ball and wire path of the chip beneath it. Consequently, chips can be tightly integrated without a gap and without having to reserve space for the bond wedges/balls.
Inventor: Choi, Hoi Wai
Priority Number: US20120292788A1
IPC Current: H01L002352 | H01L002150
US Class: 257777 | 257E21499 | 257E23141 | 438109
Assignee Applicant: The University of Hong Kong
Title: Chip stacking
Usefulness: Chip stacking
Summary: Method for stacking integrated circuit chips to form vertically stacked chip assembly (claimed) for use in microelectronic and optoelectronic applications.
Novelty: Method for stacking integrated circuit chips to form stacked chip assembly, involves forming wire bonds electrically connecting pads on top surface of green and red LED chips to primary and secondary pads of package respectively
Electronics
Circuit Design
USA
