Surround Gating of Vertical Carbon Nanotube Arrays
- Summary
- Researchers at Purdue University have developed a method to grow uniform vertical CNTs to form the basis of three-terminal electrical devices, allowing planar CNT growth over trenches for surrounding dielectric materials and gate metal deposition. This method uses insulating templates of user-defined dimensions, allowing the CNT length to be defined. In addition, it gives higher throughput in a lithography-free process. This technology provides robust structural support of each vertical CNT for the formation of an encompassing gate, which is accomplished while the CNTs remain in their initial growth locations (in situ). Furthermore, the length of the gated CNT channel can be controlled using straightforward etching processes without the need for advanced lithography. This approach allows the CNTs to be placed in precise locations with user-defined density and CNT-to-CNT separation, which has been an obstacle in the context of fabricating CNT devices for manufacture.
- Technology Benefits
- Allows for user-defined CNT dimensions and placement Lithography-free process results in higher throughput Robust structural support
- Technology Application
- Electronics industry
- Detailed Technology Description
- Purdue Materials Engineering
- Countries
- United States
- Application No.
- 8,872,154
- *Abstract
-
- *Background
- Vertical carbon nanotubes (CNTs) are known to be excellent electric and thermal conductors; however, current methods require the use of specialized templates made with lithography, more specifically photolithography, to grow the CNTs in the desired patterns. The device doing the lithography can be expensive and relatively slow in producing templates. Furthermore, growing CNTs into devices has been a great challenge, if not impossible.
- *IP Issue Date
- Oct 28, 2014
- *IP Type
- Utility
- *Stage of Development
- Prototype testing
- *Web Links
- Purdue Office of Technology CommercializationPurdue Innovation and EntrepreneurshipTimothy SandsHeterogeneous Integration Research GroupPurdue Materials Engineering
- Country/Region
- USA
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