Double-Gate SOI with High Performance Sense Amplifier
- Summary
- Purdue University researchers have developed a high-performance sense amplifier design using independent gate control in symmetric and asymmetric DG devices. This design reduces the sensing delay of the sense amplifier and dynamic power from the connected gate design. In addition, this sense amplifier shows less power dissipation, delay, and is more robust to process variations.
- Technology Benefits
- Reduced sensing delay Less power dissipation and delay More robust
- Technology Application
- Semiconductors
- Detailed Technology Description
- Kaushik RoyNanoelectronics Research LaboratoryPurdue Electrical and Computer Engineering
- Countries
- United States
- Application No.
- 7,304,903
- *Abstract
-
- *Background
- Double-gate (DG) transistors have emerged as the most promising device for nanoscale circuit design. Independent control of front and back gates in DG devices can be effectively used to improve performance and reduce power in sub-50 nm circuits. As technology scaling continues for achieving better performance, power dissipation and noise become real barriers for high performance.
- *IP Issue Date
- Dec 4, 2007
- *IP Type
- Utility
- *Stage of Development
- Prototype testing
- *Web Links
- Purdue Office of Technology CommercializationPurdue Innovation and EntrepreneurshipKaushik RoyNanoelectronics Research LaboratoryPurdue Electrical and Computer Engineering
- Country/Region
- USA
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