Zero-footprint Metrology Microsystem
- 技術優勢
- Can be used in hostile process environmentsAccurate data analysis can be collected with minimal effortForm-factor can vary from a stand-alone mot-sized device to a wafer with an arrayArray implementations could obtain accurate mapping information of process parameters at various lateral positions across wafersData acquisition is compatible with post-measurement data reading or in-situ wireless transmisison
- 技術應用
- Target applications include growth/etch processing of dielectric films and semiconductor films, chemical mechanical polishing (CMP), and curing of polymetric films (e.g. photoresist and low-k dielectrics).With appropriate modeling and calibration, refractive indexes and absorption monitoring could be expanded into broader applications including optical spectroscopy of processing chemistry.
- 詳細技術說明
- None
- *Abstract
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In order to enable the reliable reproducibility of micro-scale devices used in high volume, low cost integrated circuit manufacturing, process parameters need to be directly measured and monitored during manufacturing. Probing optical beams that are directed from external photo sources have been used to probe in-situ information such as film thickness, material density, and refractive index. However in hostile processing situations that include plasmas, corrosive solutions, or polishing slurries, the environment interferes with these optical beams and consequently makes this approach infeasible.
To address this problem, researchers at UC Berkeley have developed a new optical metrology microsystem that can be used in hostile environments. This microsystem can be implemented in a form-factor varying from a stand-alone mot-size device to a metrology wafer with an array of these metrology microsystems. To ensure accurate and precise measurements, an original implementation design and a dedicated data analysis algorithm have been developed that makes it possible to eliminate various implementation errors.
The Berkeley researchers have successfully implemented this system in a prototype wafer with 3 x 3 metrology cells. Reflectance measurements showed that the system design and analysis algorithm works. Additionally, this prototype was calibrated using a SF6 plasma etching process of silicon oxide -- which further confirmed the validity of this design and methodology.
- *Principal Investigation
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Name: Nathan Cheung
Department:
Name: Zhongsheng Luo
Department:
- 其他
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Related Technologies
Tech ID/UC Case
17662/2006-093-0
Related Cases
2006-093-0
- 國家/地區
- 美國
