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Photoelectrochemical Etching for Chip Shaping Of LEDs

Technology Benefits

Increased external quantum efficiencyLow cost etchingRapid etchingEliminate the need of mechanical etchingPossible automation of the etching process

Technology Application

SemiconductorsLED shaping

Detailed Technology Description

Researchers at the University of California, Santa Barbara have developed a novel process to chip shape LEDs though photochemical (PEC) etching. This process can directly etch the material in between LEDs that are grown on III-V substrates. By varying the angle of the incident light during PEC etching, the angle of the resulting sidewalls can be controlled to create sloped sidewalls. These walls can then scatter guided modes out of the material rather than reflecting them back, to increase the external quantum efficiency.

Supplementary Information

Patent Number: US8569085B2
Application Number: US2009576946A
Inventor: Tamboli, Adele | Hu, Evelyn L. | Speck, James S.
Priority Date: 9 Oct 2008
Priority Number: US8569085B2
Application Date: 9 Oct 2009
Publication Date: 29 Oct 2013
IPC Current: H01L002100 | H01L003100
US Class: 438031 | 257079 | 257E21599 | 257E33023
Assignee Applicant: The Regents of the University of California
Title: Photoelectrochemical etching for chip shaping of light emitting diodes
Usefulness: Photoelectrochemical etching for chip shaping of light emitting diodes
Summary: Method of fabricating a semiconductor device.
Novelty: Fabrication of semiconductor device by performing photoelectrochemical etch for chip shaping of device comprising Groups III-V semiconductor material in order to extract light emitted into guided modes trapped in semiconductor material

Industry

Electronics

Sub Category

Semiconductor

Application No.

8569085

Others

Background

Light emitting diodes’ (LEDs) external quantum efficiency is limited by light emitted into guided modes being trapped in the material. When wafers are diced, the resulting sidewalls are smooth and vertical resulting in most of the light reflecting back into the material where it is eventually lost. To counteract this phenomenon, shaping is done to modify the geometry to form non rectilinear designs, which decrease the amount of trapped light. This chip shaping involves shaping the material and substrate which may have different compositions. Moreover, the shaping is typically accomplished through crystallographic wet or dry etching or by device sawing using specialty blades.

 

Additional Technologies by these Inventors

• Backside-Illuminated Photoelectrochemical (Bipec) Etching
• Reduced Dislocation Density of Non-Polar GaN Grown by Hydride Vapor Phase Epitaxy
• Growth of Planar, Non-Polar, A-Plane GaN by Hydride Vapor Phase Epitaxy
• Cleaved Facet Edge-Emitting Laser Diodes Grown on Semipolar GaN
• Etching Technique for the Fabrication of Thin (Al, In, Ga)N Layers
• Growth of High-Quality, Thick, Non-Polar M-Plane GaN Films
• Growth of Planar Semi-Polar Gallium Nitride
• Defect Reduction of Non-Polar and Semi-Polar III-Nitrides
• MOCVD Growth of Planar Non-Polar M-Plane Gallium Nitride
• Lateral Growth Method for Defect Reduction of Semipolar Nitride Films
• Improved Manufacturing of Solid State Lasers via Patterning of Photonic Crystals
• Control of Photoelectrochemical (PEC) Etching by Modification of the Local Electrochemical Potential of the Semiconductor Structure
• Single or Multi-Color High Efficiency LED by Growth Over a Patterned Substrate
• Growth of Semipolar III-V Nitride Films with Lower Defect Density
• Enhanced Optical Polarization of Nitride LEDs by Increased Indium Incorporation
• Semipolar-Based Yellow, Green, Blue LEDs with Improved Performance
• Hexagonal Wurtzite Type Epitaxial Layer with a Low Alkali-Metal Concentration
• Photoelectrochemical Etching Of P-Type Semiconductor Heterostructures
• Highly Efficient Blue-Violet III-Nitride Semipolar Laser Diodes
• Defect Reduction in GaN films using in-situ SiNx Nanomask
• Semi-polar LED/LD Devices on Relaxed Template with Misfit Dislocation at Hetero-interface
• Limiting Strain-Relaxation in III-Nitride Heterostructures by Substrate Patterning
• Suppression of Defect Formation and Increase in Critical Thickness by Silicon Doping
• High Efficiency Semipolar AlGaN-Cladding-Free Laser Diodes
• Method for Growing Self-Assembled Quantum Dot Lattices
• Method for Increasing GaN Substrate Area in Nitride Devices
• Flexible Arrays of MicroLEDs using the Photoelectrochemical (PEC) Liftoff Technique
• Optimization of Laser Bar Orientation for Nonpolar Laser Diodes
• Improved Fabrication of Nonpolar InGaN Thin Films, Heterostructures, and Devices
• Growth of High-Performance M-plane GaN Optical Devices
• Transparent Mirrorless (TML) LEDs
• Technique for the Nitride Growth of Semipolar Thin Films, Heterostructures, and Semiconductor Devices
• Planar, Nonpolar M-Plane III-Nitride Films Grown on Miscut Substrates
• High-Efficiency, Mirrorless Non-Polar and Semi-Polar Light Emitting Devices
• High Light Extraction Efficiency III-Nitride LED
• Method for Improved Surface of (Ga,Al,In,B)N Films on Nonpolar or Semipolar Subtrates
• Improved Anisotropic Strain Control in Semipolar Nitride Devices
• III-Nitride Tunnel Junction with Modified Interface
• Enhanced Light Extraction LED with a Tunnel Junction Contact Wafer Bonded to a Conductive Oxide
• Hybrid Growth Method for Improved III-Nitride Tunnel Junction Devices
• Calcium Impurity Reduction for Improved Light-Emitting Devices
• Contact Architectures for Tunnel Junction Devices
• Internal Heating for Ammonothermal Growth of Group-III Nitride Crystals
• Methods for Fabricating III-Nitride Tunnel Junction Devices
• Fabricating Nitride Layers
• Vertical Cavity Surface-Emitting Lasers with Continuous Wave Operation

Tech ID/UC Case

23784/2009-157-0

Related Cases

2009-157-0

*Abstract

A novel process to chip shape LEDs though photochemical (PEC) etching.

 

*IP Issue Date

Oct 29, 2013

*Principal Investigator

Name: Evelyn Hu

Department:

Name: James Speck

Department:

Name: Adele Tamboli

Department:

Country/Region

USA