Miniaturized, High Performance, Energy- and Area-Efficient Field Effect Transistor Expands Computational Capability of Electronic Devices
- Detailed Technology Description
- KAUST has designed a novel, low-cost field effect transistor (FET) that can miniaturize to the 5- to 40-nm range without being hindered by the short-channel effects of other designs.
- *Abstract
-
As designers of integrated circuit components attempt to scale their dimensions below the 20 nanometer range, physical limitations as well as device performance issues become problematic. In particular, reducing the gate length of a transistor below 50 nm can lead to short-channel effects.
KAUST has designed a novel, low-cost field effect transistor (FET) that can miniaturize to the 5- to 40-nm range without being hindered by the short-channel effects of other designs. This unique architecture offers a significant improvement in performance, most notably in output current value, sub-threshold slope, trans-conductance, speed, and more prominently in reducing leakage power consumption.
By enabling greater density of transistors in an integrated circuit, this critical technology expands the computational ability of electronic devices.
This technology is part of KAUST’s technologycommercialization program that seeks to stimulate development and commercialuse of KAUST-developed technologies. Opportunities exist for joint development,patent licensing, or other mutually beneficial relationships.
- Country/Region
- USA
