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Frequency Compensation Techniques for Low-Power Multistage Amplifiers

High-gain and high-speed amplifiers are vital in analog circuits. Low-voltage design limits the structure of the amplifiers to change from cascode to cascade configuration. In addition, the stability as well as the bandwidth of the cascaded amplifiers are constrained by the existing frequency compensation techniques. The invented frequency compensation technique, damping-factor-control frequency compensation (DFCFC), is a novel technique that can substantially increase the stability and the bandwidth of cascaded amplifiers without an increase in power consumption.

The transient response in both the slew rate and the settling time are enhanced. Moreover, the power supply rejection ratio (PSRR) of the cascaded amplifiers is greatly improved by DFCFC. Experimental results on the comparison of a DFCFC amplifier to a conventional Miller compensation amplifier driving a 1nF capacitive load under the same power consumption show that the bandwidth and the slew rate can be increased by about 20 and 14 times respectively. The settling time is reduced by 9 times and the PSRR is enhanced by at least 23dB.
Technology Benefits
1. The invented technique can substantially increase the bandwidth, speed and transient performance of a 3-stage amplifier without an increase in the power consumption
2. It solves the problem on low-voltage high-speed design of amplifiers driving large capacitive load
3. It improves performance of commercial products such as low-dropout regulators in portable electronic devices and operational amplifiers
Technology Application
- Low-voltage low-power 3-stage amplifier designs
- Systems or circuits required to drive large capacitive loads such as the error amplifiers inside low-dropout regulators
- Portable electronic devices such as cellular phones, laptop computers and PDAs
Supplementary Information
Patent Number: US6208206B1
Application Number: US1999247942A
Inventor: Leung, Ka Nang | Mok, Kwok Tai Philip | Ki, Wing Hung | Sin, Kin On Johnny
Priority Date: 11 Feb 1999
Priority Number: US6208206B1
Application Date: 11 Feb 1999
Publication Date: 27 Mar 2001
IPC Current: H03F000108 | H03F000330
US Class: 330107 | 330100 | 330109
Assignee Applicant: The Hong Kong University of Science & Technology
Title: Frequency compensation techniques for low-power multistage amplifiers
Usefulness: Frequency compensation techniques for low-power multistage amplifiers
Summary: Used in analog circuits of electronic device.
Novelty: Multistage amplifier used in analog circuits of portable electronic device, has initial gain stage which receives input signal and final gain stage that outputs amplified signal
Sub Category
Circuit Design
Application Date
11 Feb 1999
Application No.
US 09/247942
Patent Information
US 6208206
ID No.
Hong Kong

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