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Dynamic Power Management of Analog Signal Processors


總結

Lead Inventors: Yannis P. TsividisProblem or Unmet Need:Low-power designs are key to the success of today's growing portable applications. In wireless receivers, analog channel select filters are used to reject strong interferers. A common way to relax dynamic range requirements is to use an automatic gain control (AGC) in front of the filter. However, most wireless receivers are subject to the presence of interferers during minimum signal reception, which limits the allowable AGC gain and necessitates high power consumption. A partial solution to this problem is to distribute the AGC operation throughout the filter. This results in filters designed with the large power dissipation necessary to handle worst-case conditions, and thus the constant power is wasted as signal reception gets better. The use of two selectable filters, each power-optimized for a different dynamic range, has been proposed, but output transients can be caused during switching.The technique briefed here presents the system and method to vary power dissipation dynamically, keeping it at the minimum level required to process the signal at hand, and without causing output transients. The techniques of dynamic impedance scaling and dynamic biasing are employed to make this possible. A coarse AGC operation is included.The system includes dynamic gain allocation, dynamic impedance scaling and dynamic biasing. The processor comprises several resistors, operational amplifiers and filter banks that are selectively coupled with respect to each other based on required transient response. Thus, the system can dynamically optimize the power consumption of analog signal processors according to the signal level and permit multiple power level scaling. It has been implemented in a 5th order channel-select filter for a zero- intermediate frequency (IF) global system for mobile (GSM) communications receiver.


技術優勢

High power consumption for only small signal range No transients at the output, even when the system structure changes dynamically Immune to presence of interferers No extra cost of area; increasing the chip area is avoided Constant signal-to-noise ratio (SNR) system design There are five levels of power scaling Opportunities: Sponsored research funding of continued research Licensing


技術應用

This technique can be used to dynamically optimize power consumption This technique can be used in most of the analog signal processers, including analog resistor-capacitor (RC) filter, amplifier and analog-to-digital converter (ADC) used in zero-IF GSM communication system.


詳細技術說明

The system includes dynamic gain allocation, dynamic impedance scaling and dynamic biasing. The processor comprises several resistors, operational amplifiers and filter banks that are selectively coupled with respect to each other based on required t...


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