Surround Gating of Vertical Carbon Nanotube Arrays
Researchers at Purdue University have developed a method to grow uniform vertical CNTs to form the basis of three-terminal electrical devices, allowing planar CNT growth over trenches for surrounding dielectric materials and gate metal deposition. This method uses insulating templates of user-defined dimensions, allowing the CNT length to be defined. In addition, it gives higher throughput in a lithography-free process. This technology provides robust structural support of each vertical CNT for the formation of an encompassing gate, which is accomplished while the CNTs remain in their initial growth locations (in situ). Furthermore, the length of the gated CNT channel can be controlled using straightforward etching processes without the need for advanced lithography. This approach allows the CNTs to be placed in precise locations with user-defined density and CNT-to-CNT separation, which has been an obstacle in the context of fabricating CNT devices for manufacture.
Allows for user-defined CNT dimensions and placement Lithography-free process results in higher throughput Robust structural support
Electronics industry
Purdue Materials Engineering
United States
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美国
