A Method of Forming Solder Bumps for Flip Chip用於鉛/錫及無鉛焊料的小間距倒裝焊凸點模板印刷製備技術
A method for the fine-pitch stencil mask design for stencil printing bumping technology for eutectic Sn/Pb and lead-free solder material is described. In the method, a reflowing enhancement layer is introduced to improve the solder quality and reduce the pitch of solder bumps. The method of forming the layer is described as well as the forming method of matching under-bump metallurgy layer. The method of stencil mask design can match various sizes and pitch of the solder bumps. The designed mask is fixed on the stencil printer to deposit the solder materials with the required patterns. This method can increase the solder paste volume to increase the height of solder bumps after the reflowing process.
1. Higher reliability of solder bump
2. Available for various solder materials and lead-free
3. materials
4. Smaller pitch solder bumps
5. Improved quality of solder
6. Reduced number of metal layers
7. Low cost process for wafer bumping
- Wafer-level flip chip packaging technology
- Solder bumping process
- Electronic product packaging application
Patent Number: HK1070986A1
Application Number: HK5103511A
Inventor: CHAN PHILIP CHING HO
Priority Date: 25 Apr 2005
Priority Number: HK1070986A1
Application Date: 25 Apr 2005
Publication Date: 22 Jun 2007
Assignee Applicant: The Hong Kong University of Science & Technology
Title: A method of forming solder bumps for flip chip
Usefulness: A method of forming solder bumps for flip chip
电子
半导体
25 Apr 2005
Hong Kong 05103511.9
Hong Kong HK1070986
TTC.PA.212S
香港
