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Nanoscale Interconnects Fabricated by Electrical Field Directed Assembly of Nanoelements

技術優勢

Value PropositionThe procedure:ΓÇóIs extremely cheap and cost effective, allowing effective performance at room temperature and pressure, as compared to some of prior art procedures requiring high or low temperatures/pressuresΓÇóEnables an effective reduction of grain boundaries, one of process limitations as observed with prior art procedures, thereby keeping a constant check at overall resistivity and electromigrationΓÇóIs effective in assembling both charged and uncharged particlesΓÇóIs further utilized with high aspect ratio as compared to conventional proceduresΓÇóAllows for production of nanoscale interconnects that are useful for variety of commercial applications such as in electronics, photonics, and biomedical device

詳細技術說明

None

*Abstract

Many prior art approaches have been used to integrate nanoelements for fabrication of nanostructures. On the other hand, fewer approaches are available for assembly of such nanoelements for sensors and CMOS interconnect applications. Dielectrophoresis, high/low pressure vapor deposition and electroplating are some of the common approaches used in this regards. However, most of these techniques are associated with possible limitations such as decreased efficacy in higher aspect ratio range, increased resistivity and electro-migration; resulting in reduced performance of such assemblies. This novel procedure enables efficient development and use of nano interconnects fabricated at a large scale using electrical field based assembly of nanoelements.

*Principal Investigation

Name: Ahmed Busnaina

Department:

Name: Taehoon Kim

Department:

Name: Sivasubramanian Somu

Department:

Name: Cihan Yilmaz

Department:

國家/地區

美國