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Robust High Speed Analog QAM Demodulator for Advanced Wireless Applications

技術優勢

Power efficiency improved as a result of the reduced design complexity of the analog QAM designIncreased wireless communication speed for cellular or personal computingAutomatic tracking of gain variations

技術應用

· High speed wireless data transfer systems: Virtual reality applicationsMobile communications · Reduce the energy requirement for high speed signal communication

詳細技術說明

Technology is undergoing major developments, moving towards real-time high quality application. Accordingly, recent need for high speed wireless data transfer has been identified for applications like virtual reality multi-gigabit-per-second data transfer systems. With current systems, it is not possible to accommodate such demanding increases with the current capabilities of digital wireless transmission systems, as bandwidth expansion is no longer a realistic option due to band crowding below 30GHz. Furthermore, digital wireless communication systems at speeds greater than 10 Gbps would be impractical and inefficient due to a high degree of circuit complexity and excessive power consumption needs. A simplified, power efficient high-speed wireless communication methodology is critical to accommodate the emerging high speed wireless applications. UCI researchers have developed a simplified analog approach to high speed wireless communication. The novel receiver demodulates the signal directly in the analog domain, eliminating the need for analog to digital conversion followed by the digital processing. With such simplified circuitry, power requirements are reduced, chip area is minimized, yet signal demodulation speeds are increased.

*Abstract

Wireless applications are witnessing major advancement in fields like virtual reality and cellular phones, thus requiring much higher data transfer speed. This technology is a novel architecture for wireless receivers that accommodates such targeted high data rates, while maintaining a cost efficient design; power efficient while still utilizing simple circuits design, through replacing complicated digital blocks with innovative analog ones.

*Principal Investigation

Name: Farzad Etemadi

Department:

Name: Payam Heydari

Department:

Name: Hamid Jafarkhani

Department:

其他

State Of Development

System has been designed and validated using computer simulations (showing the Bit error rates as well as the power performance)

Tech ID/UC Case

29190/2017-984-0

Related Cases

2017-984-0

國家/地區

美國