Semiconductor heteroepitaxy structure manufacturing - 1901
- *Abstract
-
Overview
Modern integrated circuits (ICs) have a profound impact on society because of the high growth in consumer electronics such as mobile phones and laptops. The key device in ICs, which functions as switches in logic gates, is the silicon-based metal-oxide-semiconductor field-effect transistor (MOSFET). For the past four decades, continuous scaling of MOSFETs and interconnects has dramatically improved the performance of microprocessors and memory chips used in many consumer electronic products. However, it is increasingly difficult to scale silicon (Si) MOSFETs because hafnium-based gate oxide is approaching its limit due to power constraint and mobility degradation. Si complementary-metal-oxide-semiconductor (CMOS) has entered an era of power-constrained scaling. Without scaling gate oxide, high-mobility channel materials are needed for MOSFETs to enable increased performance and reduced power consumption.
Invention
UK researchers have developed a method of manufacturing a semiconductor structure ex situ which involves (1) depositing a layer of semiconductor oxide on a base semiconductor layer, (2) scavenging oxygen from the layer of semiconductor oxide, and (3) recrystallizing the oxygen scavenged layer of semiconductor oxide as a semiconductor heteroepitaxy layer.
Applications
- semiconductors and electrical devices
Advantages
- a greatly simplified manufacturing process
- a more efficient and cost-effective manufacturing process
- increasedperformance
- reduced power consumption
IP Status: U.S. Patent No. 9,647,094
- 國家/地區
- 美國
