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SiC Power DMOSFETs with Self-Aligned Source Contacts

總結
Purdue University researchers have developed a novel design for DMOSFETs with self-aligning source contacts, which reduce the size of the source contacts and consequently reduces the specific-on resistance of the device.
技術優勢
Reduces specific on-resistanceIncrease yield Decreased cost
技術應用
Computer TechnologyCircuitryHardware
詳細技術說明
James Cooper Jr.Purdue Electrical and Computer Engineering
*Abstract

*Background
In power double-diffused metal-oxide-semiconductor field-effect transistors (DMOSFETs) fabricated in the silicon carbide SiC process, it is difficult to find a process that yields consistent results without slightly hindering the performance of the device. In order to reduce misalignment errors, the source contacts are designed slightly larger than necessary to allow for adjustments. These misalignment errors can lead to large contact resistances.
*IP Issue Date
Oct 11, 2011
*IP Type
Utility
*Stage of Development
Proof of Concept
*Web Links
Purdue Office of Technology CommercializationPurdueInnovation and EntrepreneurshipJames Cooper Jr.Purdue Electrical and Computer Engineering
國家
United States
申請號碼
8,035,112
國家/地區
美國

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