Emitter-Coupled Spin-Transistor Logic
- 技術優勢
- Faster computing Low power Cascaded logic High noise tolerance
- 詳細技術說明
- A new paradigm for performing automatic computation developed using spin-transistors.#semiconductor #component #transistor
- *Abstract
-
Continued reduction in transistor sizes has provided the technological basis for marked circuitperformance improvements, making possible billion transistor integrated circuits operating atgigahertz frequencies. The smaller size of these devices, however, results in increased fabrication difficulties, higher power densities, and parasitic effects that threaten to limit the further improvement of Si-based circuits. In an effort to provide continued improvements in computing performance, newly available materials and devices have been evaluated as building blocks for next generation computing. This invention is a new paradigm for performing automatic computation developed using spin-transistors. Emitter-coupled spintransistor logic provides significant improvements in speed, power, and area, promising to be a very high-performance logic family for the next generation of computing. This new paradigm has the potential to replace CMOS for general computing applications.
- *Inventors
- Joseph FriedmanGokhan MemikBruce Wessels
- 國家/地區
- 美國
