Media.Player

Low-Power Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders

總結

The invention makes the generation of a low frequency error clock source for backscatter link frequency possible. The power consumption of the invention is very low such that the reading distance of a passive transponder is not harmed. Also the clock calibration process continuously conducted in the whole downlink duration to prevent frequency drifting before the backscatter communication. The calibration process does not need any special training sequence. Thus there is no dead time in terms of information flow for interrogator to transponder communication.

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附加資料

Inventor: CHAN, Chi-Fat | PUN, Kong Pang | LEUNG, Ka Nang Alex | CHOY, Chui-Sing Oliver
Priority Number: US20110156871A1
IPC Current: H04B0007005
US Class: 3400101
Assignee Applicant: The Chinese University of Hong Kong
Title: FREQUENCY CALIBRATING
Usefulness: FREQUENCY CALIBRATING
Novelty: Device for calibrating frequency of transponder in radio frequency identification (RFID) system, calibrates frequency of clock signal towards target frequency based on comparison of counted number of clock cycles with reference number

主要類別

信息和通信技術/電信

細分類別

電信

申請號碼

09/ENG/333/ITF

其他

Inventor(s): Professor Kong-pang PUN, Department of Electronic Engineering

Patent Status: US Patent Pending Licensing Status: Available for licensing

國家/地區

香港